Home Forums MagCAD Support HDL Models Error During Simulating using Xilinx ISE

Viewing 4 posts - 1 through 4 (of 4 total)
  • Author
    Posts
  • #1737
    Saurabh KumarSaurabh Kumar
    Participant

    Hi,
    I was simulating my design and there is no error in MagCAD. While I enter the values in Xilinx and run syntax check, it shows the Error “Physical unit does not denote a physical type”
    Can you please have a look. I am attaching my qll file also.

    #1739
    UmbertoUmberto
    Moderator

    Hi,
    please attach also the qll of the component that are inside your design.
    Some more information about the error would be useful too.
    Umberto

    #1740
    Saurabh KumarSaurabh Kumar
    Participant

    Please find attached the files.

    Thanks
    Saurabh

    #1743
    FabrizioFabrizio
    Moderator

    Hi,

    you are getting this error because one of the signals is named “sec”, which is a VHDL keyword for seconds.

    Fabrizio

Viewing 4 posts - 1 through 4 (of 4 total)
  • The topic ‘Error During Simulating using Xilinx ISE’ is closed to new replies.
https://dewisurga.net/
https://pharmaspecific.com/contact-us/
https://www.bng-tech.com/en/
https://viewlike.us
https://ppseawa.org.tw/sub_1/
https://hotel.kirpisoft.com.tr/
https://www.amerikankonsoloslugu.org/
https://www.singaporesunfestival.com/
https://epu-upr.org/
https://www.acholinet.com/
https://m.exim-pharm.com/
https://pharmaspecific.com/en/
https://tri-aster.com/about-us.php
https://www.arcadia-medical.com/
https://gatorcues.com/contact-us/
https://www.ozteknikbeyazesya.com/iletisim/
https://alumni.kongu.edu/about-us/
https://www.avaniagrotourism.com/about.php
https://angad.vic.edu.au/contact/
https://topmaistori.eu/
https://www.premitek.com/contact.html
https://amremobility.com/careers/
https://fcaf.org.tw/WP/
https://jaihindmedia.in/about-us/
https://www.revampservice.com/faq.php
https://oficialdocnet.com.br/contato/