Dear Peyman,
MagCAD vhdl files are not valuable description for ToPoliNano.
You can use that vhdl to simulate your design with standard HDL simulator (modelsim for example).
If you want to simulate your design with ToPoliNano you can import the layout directly:
-file->import layout
-select from disk the “.qll” file you want to open.
-simulate it providing a valid testbench.
Please, consider that the automatic testbench generated by MagCAD is not valid for ToPoliNano. You should remove all the clock processes to use it inside ToPoliNano.
Umberto