Home › Forums › ToPoliNano Support › HDL Compiler › Parser Error for synopsys DC generated net list VHDL/.v code in ToPoliNano › Reply To: Parser Error for synopsys DC generated net list VHDL/.v code in ToPoliNano October 23, 2020 at 6:18 am #2228 FabrizioModerator Dear Raja Sekar, unfortunately feedbacks are not supported in iNML designs. Best regards. Fabrizio
