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May 2, 2018 at 8:49 am
#1475
peyman safiri
Participant
hi , I updated magcad software and exported topolinano testbench but another erroe apeared , I atached my testbench and screenshot.
my testbench :
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-- Testbench automatically generated by MagCAD --
-- Date: 02/05/2018 --
-- Time: 13:07:21 --
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-- Entity: iNML/xor/xor
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-- DO NOT MODIFY THIS TB, EXCEPT THE INPUT STIMULI PROCESS
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library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity tb_iNML_xor_xor is
end tb_iNML_xor_xor;
architecture Behavioural of tb_iNML_xor_xor is
signal A :std_logic;
signal BN :std_logic;
signal B :std_logic;
signal NA :std_logic;
signal o :std_logic;
component iNML_xor_xor is
port(
A: in std_logic;
BN: in std_logic;
B: in std_logic;
NA: in std_logic;
o: out std_logic);
end component;
begin
DUT : iNML_xor_xor port map(A => A,
BN => BN,
B => B,
NA => NA,
o => o);
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-- PLEASE, DO NOT MODIFY BEFORE THIS POINT
-- USE THIS PROCESS TO INSERT INPUT STIMULI
-- Please use the following example as a reference:
-- input_proc: process
-- begin
-- in1<='0';
-- in2<='0';
-- wait for 30 ns;
-- in1<='0';
-- in2<='1';
-- wait for 30 ns;
-- in1<='1';
-- in2<='1';
-- wait for 30 ns;
-- in1<='1';
-- in2<='0';
-- wait for 100 us;
-- process input_proc;
--
--
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input_proc: process
begin
BN <='1';
NA <='1';
B <='0';
A <='0';
wait for 95 ns;
BN <='0';
NA <='1';
B <='1';
A <='0';
wait for 95 ns;
BN <='1';
NA <='0';
B <='0';
A <='1';
wait for 95 ns;
BN <='0';
NA <='0';
B <='1';
A <='1';
wait for 100 ns;
end process input_proc;
end Behavioural;
- This reply was modified 6 years, 8 months ago by Umberto.