[Rishikesh G]

Thanks a lot, sir…

[Rishikesh G]

Thanks a lot, sir. Now it is working fine…

[Rishikesh G]

the following full adders and Ripple carry adder circuit

Attachments:

1. FA_pnml-2.qll
2. rca-2.qll

[Rishikesh G]

Sir, I am attaching here the updated files. I have checked it is exporting VHDL code….

Attachments:

1. and_pnml-2.qll
2. or_pnml-2.qll
3. xor_pnml-2.qll
4. HA_pnml-2.qll

[Rishikesh G]

In my laptop magCAD is exporting FA file there is no error sir(VHDL generation). And I have checked all the components in the hierarchy they are no errors. Thank you for your responses sir

[Rishikesh G]

the follwing files…

Attachments:

1. FA_pnml-1.qll
2. rca-1.qll

[Rishikesh G]

Sir, I am using the latest versions of magCAD.I am getting no errors while simulating xor. Let me re-upload the files so that u can look into the error.

Attachments:

1. and_pnml-1.qll
2. or_pnml-1.qll
3. xor_pnml-1.qll
4. HA_pnml-1.qll

[Rishikesh G]

Yes, sir MagCAD(PNML). I am attaching (and_pnml and or_pNML) below sir. Sorry for the trouble…

Attachments:

1. and_pnml.qll
2. or_pnml.qll

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