Hello,
Can you please tell me how to calculate the area of my design. I have read the forum in which you have said that we have to multiply the number of blocks the circuit occupies with the dimension of one block. However, I am getting a wrong answer when I compare the area of the full adder. I have tried multiplying it with 300 as that was the dimension given of one block in MagCAD.
This topic was modified 6 years, 9 months ago by Fabrizio.
since version 2.2.0, the bounding box area is automatically computed by MagCAD and saved within the log file generated during the VHDL netlist extraction.
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