AND GATE

[Rishikesh G]

Greetings sir,
I am trying to design AND GATE using pNML in magCAD.but WHen I Simulate it in xlinix. I am getting 0,1,1,1for the inputs 00,01,10,11.I don’t get the logic sir. Please kindly help me.I am attaching the files below

Attachments:

1. expp.qll

[Fabrizio]

Dear Rishikesh,

when you apply inputs to the circuit they get inverted on the ANC.
It is normal what you get.

Best regards.

[Fabrizio]

Dear Rishikesh,

when you apply inputs to the circuit they get inverted on the ANC.
It is normal what you get.

Best regards.

[Author]

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