Home › Forums › MagCAD Support › Circuit Design › Optimising the design to implement Boolean expressions › Reply To: Optimising the design to implement Boolean expressions
December 20, 2017 at 9:43 am
#1098
Fabrizio
Moderator
Hi,
from you screenshots I see two identical gates implementing a 2 input NAND gate. The nucleation center surrounded by 3 inputs implements a negated majority voter.
To optimize circuits, I suggest you to synthetize the boolean network with ABC or by using MIG before drawing the schematics with MagCAD.
- This reply was modified 6 years, 3 months ago by Fabrizio.