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#1098
FabrizioFabrizio
Moderator

Hi,
from you screenshots I see two identical gates implementing a 2 input NAND gate. The nucleation center surrounded by 3 inputs implements a negated majority voter.
To optimize circuits, I suggest you to synthetize the boolean network with ABC or by using MIG before drawing the schematics with MagCAD.

  • This reply was modified 3 years, 10 months ago by FabrizioFabrizio.