Home › Forums › MagCAD Support › Circuit Design › AND GATE This topic has 2 replies, 2 voices, and was last updated 5 years, 1 month ago by Fabrizio. Viewing 3 posts - 1 through 3 (of 3 total) Author Posts November 1, 2019 at 9:55 am #1936 Rishikesh GParticipant Greetings sir, I am trying to design AND GATE using pNML in magCAD.but WHen I Simulate it in xlinix. I am getting 0,1,1,1for the inputs 00,01,10,11.I don’t get the logic sir. Please kindly help me.I am attaching the files below Attachments: expp.qll November 12, 2019 at 3:01 pm #1942 FabrizioModerator Dear Rishikesh, when you apply inputs to the circuit they get inverted on the ANC. It is normal what you get. Best regards. November 12, 2019 at 3:01 pm #1943 FabrizioModerator Dear Rishikesh, when you apply inputs to the circuit they get inverted on the ANC. It is normal what you get. Best regards. Author Posts Viewing 3 posts - 1 through 3 (of 3 total) You must be logged in to reply to this topic. Log In Username: Password: Keep me signed in Log In