AND GATE – ToPoliNano

This topic has 2 replies, 2 voices, and was last updated 6 years ago by Fabrizio.

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November 1, 2019 at 9:55 am #1936
Rishikesh G
Participant
Greetings sir,
I am trying to design AND GATE using pNML in magCAD.but WHen I Simulate it in xlinix. I am getting 0,1,1,1for the inputs 00,01,10,11.I don’t get the logic sir. Please kindly help me.I am attaching the files below
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1. expp.qll
November 12, 2019 at 3:01 pm #1942

Fabrizio
Moderator

Dear Rishikesh,

when you apply inputs to the circuit they get inverted on the ANC.
It is normal what you get.

Best regards.

November 12, 2019 at 3:01 pm #1943

Fabrizio
Moderator

Dear Rishikesh,

when you apply inputs to the circuit they get inverted on the ANC.
It is normal what you get.

Best regards.
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